A Random Access Machine (RAM) has a central processor with basic operations (addition, subtraction, read/write of a memory cell, branch on zero, branch on positive, etc.). Under the uniform cost model each basic operation costs one unit of time, regardless of operand size.

Under the logarithmic cost model the cost of a basic step is proportional to the bit-length of its arguments: adding two \(n\)-bit numbers costs \(\Theta (n)\), and reading an \(n\)-bit word from an address described by \(n\) bits costs \(2n\).

A Pointer Machine (Kolmogorov–Uspenskii machine) operates on a constant-degree directed graph: its input, output and working memory are nodes; at each step the CPU node inspects the configuration of nodes within distance two of itself and rearranges edges, possibly creating new nodes. Any reasonable model is simulable on a Pointer Machine up to a constant factor.

An (acyclic) Boolean circuit has gates each computing a Boolean function of two input wires; a gate output may fan out to many wires. The size is the number of wires and the depth is the length of the longest directed path. This is the model used to analyze the parallel decoders.